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How Strata runs a 125-billion-parameter model on a single 12 GB to 24 GB graphics card
A 125-billion-parameter Mixture-of-Experts (MoE) model like Qwen3.8-Flash-Next is 66 GB to 76 GB on disk even after 2-bit or 3-bit compression. That is five times larger than the 12 GB of video memory (VRAM) on a midrange desktop graphics card, and nearly three times larger than a 24 GB workstation or cloud card.
Yet the model does not use all 125 billion parameters at once. For each token it generates, its routers pick 10 experts out of 512 at each of the 48 layers, activating only 6 billion parameters (3.5 GB of dense weights plus 0.66 GB of expert weights in Q2_0, and <= 23 KB of n-gram rows). Smaller MoE models such as 35B-A3B architectures follow the same pattern, activating 3 billion of their 35 billion parameters per token.
Strata (v0.1.45, released under the MIT License) is a specialized C++, CUDA, HIP, and AVX-512/AVX2 inference engine built around that sparsity. Instead of stalling while layers page in from system memory, Strata divides the model across GPU VRAM, pinned host RAM, and direct NVMe SSD reads so the graphics card, the PCIe bus, and the CPU cores work on the same layer at the same instant. This page walks through the three mechanisms that make it work, shares our measured benchmarks on a single 24 GB Modal A10 alongside published numbers on consumer NVIDIA and AMD cards, and explains how Strata pairs with Gyro TQ quantization.
Step 1. Put every weight on the memory tier that matches its reuse
In a dense model, every weight is read on every token, so overflowing VRAM slows generation down to system RAM speed. In Qwen3.8-Flash-Next, different parts of the checkpoint have wildly different access patterns across its 48 layers:
| Part of the model | Stored size (Q2_0) |
Bytes read per token | Memory tier in Strata |
|---|---|---|---|
Dense mixers, attention, shared experts, routers (36 Gated DeltaNet + 12 Qwen Sparse Attention layers) |
1.8 GB |
1.8 GB (100%) |
Tier 1: GPU VRAM (always resident) |
| Gated-residual hyper-connections | 1.3 GB |
1.3 GB (100%) |
Tier 1: GPU VRAM (always resident) |
| Output head | 0.44 GB |
0.44 GB (100%) |
Tier 1: GPU VRAM (always resident) |
| Multi-Token Prediction (MTP) draft layer | 0.8 GB |
0.8 GB per draft |
Tier 1: GPU VRAM (always resident) |
Routed experts (48 layers × 512 = 24,576 experts; 10 active per layer) |
34.0 GB (35.5 GB in IQ2_XS, 43.0 GB in IQ3_XXS) |
0.66 GB (2%) |
Tier 2: Pinned host RAM (all 24,576 experts) + Tier 1: Adaptive GPU VRAM cache (fills all remaining VRAM) |
Per-Layer Embedding (PLE) n-gram table (51B parameters) |
28.8 GB (IQ4_NL) to 50.7 GB (BF16) |
<= 23 KB (16 rows) |
Tier 3: NVMe SSD via unbuffered direct I/O (--ple-io direct) |
Provenance: Published tensor byte breakdown and tier mapping from upstream Strata v0.1.45 documentation (docs/DETAILS.md, docs/MODELS.md, and docs/paper/Strata-Paper.pdf).
By separating those three tiers, Strata avoids wasting fast memory on cold weights:
Tier 1: GPU VRAM (12 to 24 GB) holds the always-hot core plus an adaptive expert cache
The ~3.5 GB of dense weights and the 0.8 GB MTP draft layer never leave VRAM. Whatever VRAM remains after the KV cache is packed with the most frequently routed experts (~4,500 of 24,576 experts on a 12 GB RTX 5070 at 4K context; 22,107 MiB of 23,028 MiB total VRAM used on our 24 GB Modal A10 run). Every extra gigabyte of VRAM holds roughly 700 additional experts. Because conversation topics shift, Strata updates this cache on the fly: every 4 decode rounds, it swaps up to 96 newly hot experts into the slots of the least-used ones without pausing generation, raising the VRAM expert hit rate on a 12 GB card from 50% (static profile) to 72%.
Tier 2: Pinned host RAM (32 to 64 GB) holds all 24,576 routed experts
At startup, Strata locks the expert arena into page-locked host RAM (35.9 GiB host RAM used on our Modal A10 run with IQ2_XS, or 23 GB for the half-expert Coder variant that fits on a 32 GB PC). When a machine has less RAM than the full expert arena, Strata's --resident-experts mode copies only the experts that are not already sitting in GPU VRAM (~16 to 18 GB in RAM when paired with a 24 GB GPU), doing zero SSD reads during generation.
Tier 3: NVMe SSD (--ple-io direct) serves the 28.8 GB n-gram table without touching RAM cache
The 51-billion-parameter PLE table is indexed purely by the last three token IDs, so the engine knows which 16 rows (<= 23 KB) a token needs before the layer starts. Strata issues 16 unbuffered O_DIRECT reads one step ahead straight from the NVMe drive (14.4K+ rows/s vs 2.1K rows/s with mmap on a 77.8K-token prompt), leaving system RAM and the operating system's page cache undisturbed for the expert arena.
Interactive 1: Three-tier memory placement cross-section (GPU VRAM, pinned host RAM, and direct NVMe SSD)
Switch hardware preset and quantization pack to inspect live byte placement across the three tiers
Provenance: Published three-tier architecture from Strata docs/paper/tiers.svg and docs/DETAILS.md, combined with Pastel Labs' measured Modal A10 24 GB run (22,107 MiB of 23,028 MiB VRAM and 35.9 GiB host RAM used on IQ2_XS).
Step 2. Run the GPU, the PCIe copy engine, and the CPU on the same layer at the same instant
Even with a 72% VRAM hit rate on a 12 GB card, roughly 3 of the 10 active experts at each layer are not in GPU memory. Waiting for those misses in series would stall the GPU. Strata hides the misses with three mechanisms that run inside a single ~0.6 ms layer step:
Mapped host doorbell and a single captured CUDA graph
All 48 layers of a verify window are captured as one CUDA graph per window size. At each layer, the GPU runs the attention or DeltaNet mixer and the router, then writes the 10 selected expert IDs into a tiny 4-byte stream-ordered "doorbell" in mapped pinned host memory. The CPU spins on that doorbell with zero CUDA driver synchronization overhead and immediately partitions the layer's 10 experts.
Dynamic PCIe and CPU co-execution (--pcie-frac auto-refinement)
While the GPU computes the experts that are already cached in VRAM, the missed experts are split between the PCIe bus and the CPU cores. Strata measures the wall-clock speed of the CPU's AVX-512 / AVX2 expert thread pool (R GB/s, such as 32 to 37 µs per expert on an RTX 3060 host) against the probed PCIe link speed (L GB/s) and sets the PCIe DMA share to:
The GPU's DMA copy engine pulls that fraction across PCIe while the CPU computes the remaining missed experts in place in system RAM at the exact same instant, writing the finished vectors back into mapped memory for the GPU to sum. At 4K context with Q2_0 on a 12 GB RTX 5070 and 6-core Ryzen 5 7600, one 48-layer verify window takes 34.3 ms: 14.6 ms on the GPU and 13.4 ms on the CPU, balanced to within a millisecond while the CPU streams expert weights from DDR5 at 41 GB/s. Auto-refining the PCIe share from 0.55 to 0.20 on an RTX 3060 (IQ3_XXS) lifted decode throughput by +30.0% (5/5 paired runs). For short prompts (< 1,024 tokens, STRATA_PREFILL_CPU_SHARE=auto), the CPU also takes rare prompt experts, cutting 512 to 1,000-token prompt time by 22% to 26% on RTX 5070 (Q2_0), 19% to 28% on RTX 3060 (IQ3_XXS), 25% to 35% on Tesla P100, and up to 41% to 49% on PCIe 3.0 x8 setups (KL = 0.0005 to 0.0007).
Verify-window route tail skip (STRATA_ROUTE_TAIL_SKIP=7)
When verifying a window of up to 4 tokens at once, an expert that is missing from VRAM and is ranked at the very tail of the router's top-10 (rank 7, 8, or 9, carrying the smallest router weights) by every token in the window contributes almost nothing to the sum. Strata skips copying or computing those unanimous tail misses altogether (while keeping every VRAM-resident expert and any expert ranked 0..6 by at least one token). Across interleaved benchmarks on fresh engines, route tail skip speeds up decoding by +15.6% on RTX 3060 (IQ3_XXS), +12.9% on RTX A4000 (Q2_0), and +14.6% on Tesla P100 (5/5 paired runs each), while keeping 97.7% to 98.2% top-1 token agreement and a mean teacher-forced KL divergence of 0.0030 to 0.0058. (When 90% or more of all experts already fit in VRAM, Strata automatically disables tail skip.)
Interactive 2: Single-layer doorbell, verify-window route tail skip, and dynamic PCIe + CPU co-execution
Compare serialized offload against Strata's parallel doorbell + L / (L + 1.85 R) split + STRATA_ROUTE_TAIL_SKIP=7
Provenance: Published co-execution and route-tail-skip ablations from Strata docs/DETAILS.md and docs/paper/Strata-Paper.pdf (34.3 ms per 48-layer verify window on RTX 5070 Q2_0 with 14.6 ms GPU and 13.4 ms CPU in parallel; +30.0% decode gain from auto-refined PCIe share on RTX 3060; +12.9% to +15.6% gain from STRATA_ROUTE_TAIL_SKIP=7).
Step 3. Verify 3 to 4 tokens per pass and stream the KV cache out to 262K context
Reading 3.5 GB of dense weights on the GPU costs almost the same time whether you process one token or four tokens together. Strata turns single-token generation into small multi-token batches and keeps long contexts from evicting cached experts out of VRAM:
Exact speculative decoding with the model's own MTP layer and prompt lookup
Qwen3.8-Flash-Next has a built-in one-layer Multi-Token Prediction (MTP) head that standard GGUF conversions strip out. Strata fetches just those MTP tensors, packs their experts to 2-bit (~0.8 GB in VRAM with a vocabulary subset covering 106,299 English, code, and CJK token IDs), and drafts up to 3 tokens ahead whenever draft confidence is at least 50%. When a reply edits code or quotes earlier context, prompt lookup drafts up to 5 tokens straight from the prompt (+6% to +11% faster on code edits). All 48 layers then verify the last accepted token plus the drafts in one pass, accepting 2.4 to 3.2 tokens per pass on average (3.23 to 3.28 tokens/window at 4K context). That raises 4K decode speed by 1.6x to 1.8x (47–57 tok/s plain to 82–95 tok/s with MTP), with greedy output that is 100% token-for-token identical to non-speculative decoding. For temperature-sampled generation, opt-in coupled Gumbel-max drafting (STRATA_SPEC_COUPLED=1, STRATA_SPEC_GUMBEL=1) keys exponential noise by token ID so the draft and target models agree more often, lifting draft acceptance from 52.8% to 59.9% (+9% output tok/s on Radeon 8060S).
Constant-memory DeltaNet layers plus streaming and K8V4 KV cache out to 262K tokens
In Qwen3.8-Flash-Next, 36 of the 48 layers use Gated DeltaNet, a linear-attention mixer whose recurrent state has a fixed size regardless of prompt length (O(1) per token). Only 12 layers use Qwen Sparse Attention (2 KV heads attending to at most ~2,048 selected positions). Even so, at 262,144 (262K) tokens an 8-bit KV cache in VRAM would shrink the expert cache from ~4,500 slots down to ~1,589 slots on a 12 GB card. Above 64K context, Strata turns on KV streaming (--kv-resident 32768): it keeps the active 32,768 KV positions in VRAM and streams older KV blocks from pinned host RAM (~13.7 KB of RAM per token, or 1.7 GB at 128K context). Freeing that VRAM lifts 262K cached experts on an RTX 5070 (Q2_0) from 1,589 to 3,872 slots and raises decode speed from 50.9 to 62.6 tokens/s with identical attention values. Pairing that with hybrid K8V4 KV quantization (--kv k8v4, keeping keys in 8-bit and values in Hadamard-rotated 4-bit) cuts KV memory by another 23%, boosting 198K-context decode on an RTX 3090 (Coder) from 85 to 99 tokens/s (+780 expert slots on an 8 GB RTX 2060 SUPER at 128K) with the same needle-in-a-haystack retrieval score.
Interactive 3: MTP verify window (Panel 3A) and 36 DeltaNet + 12 Sparse Attention KV streaming to 262K (Panel 3B)
Vary context length, KV residency mode, and MTP drafting to see VRAM expert slots and decode throughput
Provenance: Published MTP verification and --kv-resident 32768 / --kv k8v4 measurements from Strata docs/DETAILS.md and docs/MODELS.md on RTX 5070 12 GB (Q2_0, 1,589 to 3,872 cached experts and 50.9 to 62.6 tok/s at 262K context) and RTX 3090 24 GB (85 to 99 tok/s at 198K context).
Measured speed on a single 24 GB cloud A10 and on 12 GB to 32 GB consumer cards
We benchmarked Strata v0.1.45 (commit 477ac13c) with Qwen3.8-Flash-Next IQ2_XS (32,768 context, int8 KV, MTP speculative decoding on, temperature 0) on a single 24 GB NVIDIA A10 container on Modal (4 CPU cores requested, 64 GiB RAM, $1.80/hr combined GPU + CPU + RAM rate; total run cost $0.25 to $0.32). After loading in 32.0 s (24.0 s with warm page cache), Strata filled 22,107 MiB of the card's 23,028 MiB VRAM with dense layers and cached experts and pinned 35.9 GiB of host RAM:
Workload (Qwen3.8-Flash-Next IQ2_XS, 1x A10 24 GB) |
Prompt tokens | Prompt prefill (tok/s) |
Output decode (tok/s) |
Time to first token / wall time |
|---|---|---|---|---|
| Short chat (3 runs) | 100 |
- | 88.8 (81.1 to 118.0) |
0.32 s TTFT |
| 4K prompt prefill (3 runs) | 4,019 |
1,778.0 |
- | 2.28 s TTFT |
| 16K prompt prefill (3 runs) | 16,058 |
2,063.0 |
- | 7.81 s TTFT |
Multi-turn agent session (up to 14.6K context) |
1,014 to 1,395 / turn |
- | 80.5 (67.0 to 99.8) |
2.12 s TTFT (68.6% prompt cache hit) |
| 4K prompt + 256 generated tokens | 3,510 |
1,734.6 |
77.0 |
5.36 s total wall |
| 16K prompt + 256 generated tokens | 14,031 |
1,977.7 |
77.4 |
10.42 s total wall |
Security code review: SQL injection (CWE-89) |
- | - | 95.1 (631 tok out) |
Identified CWE-89, exploit, and parameterized fix |
Security code review: OS command injection (CWE-78) |
- | - | 99.4 (777 tok out) |
Identified CWE-78, payload, and subprocess list fix |
Security code review: DOM XSS (CWE-79) |
- | - | 92.7 (814 tok out) |
Identified CWE-79, onerror vector, and textContent fix |
Provenance: Measured by Pastel Labs on a single 24 GB NVIDIA A10 container on Modal running Strata v0.1.45 (commit 477ac13c) with Qwen3.8-Flash-Next IQ2_XS (32,768 context, int8 KV, MTP speculative decoding enabled, temperature 0). On a 48 GB Modal L40S, smaller 35B-A3B MoE models (Ornith-1.5 35B-A3B and Sage-A1.5, 35B total / 3B active) reach 177.5 tok/s and 175.4 tok/s decode versus 39.4 tok/s on a dense Qwen3.8-27B model.
Consumer NVIDIA and AMD desktop cards: Because 36 of 48 layers use O(1) Gated DeltaNet state and the remaining 12 use sparse attention, both prompt reading and token generation stay fast from 1K out to 128K and 262K tokens across 12 GB to 32 GB consumer cards:
| Graphics card and host | Model size | Short / 4K output (tok/s) |
32K output (tok/s) |
128K output (tok/s) |
262K output (tok/s) |
4K / 32K prompt prefill (tok/s) |
Source |
|---|---|---|---|---|---|---|---|
NVIDIA RTX 5070 12 GB (Ryzen 5 7600, 64 GB DDR5) |
Q2_0 (66 GB) |
93.0 to 94.0 |
81.8 |
73.7 to 76.4 |
60.3 to 62.6 |
1,299 / 2,171 (2,653 in 0.1.36) |
Published |
NVIDIA RTX 5070 12 GB (Ryzen 5 7600, 64 GB DDR5) |
IQ2_XS (68 GB, recommended) |
78.6 to 79.6 |
76.3 |
62.7 |
52.8 |
1,256 / 2,092 |
Published |
NVIDIA RTX 5070 12 GB (Ryzen 5 7600, 64 GB DDR5) |
IQ3_XXS (76 GB) |
61.6 to 61.9 |
58.5 |
49.0 |
- | 1,007 / 1,745 |
Published |
NVIDIA RTX 5070 12 GB (Ryzen 5 7600, 64 GB DDR5) |
IQ3_S (50 GB experts) |
52.4 to 53.3 |
48.3 |
45.5 |
- | 913 / 1,624 |
Published |
NVIDIA RTX 5070 12 GB (Ryzen 5 7600, 64 GB DDR5) |
Coder (IQ1_M, fits 32 GB RAM) |
55.1 to 58.9 |
54.9 |
43.0 |
42.8 |
1,583 / 2,177 |
Published |
AMD RX 7900 XTX 24 GB (gfx1100, Ryzen 9 7900X, 96 GB RAM) |
IQ3_S |
60.4 to 65.1 |
64.4 |
59.2 |
- | 1,275 / 1,641 |
Published |
AMD RX 9070 XT 16 GB (gfx1201 RDNA4, Ryzen 9 3900X, 47 GB RAM) |
Q2_0 / IQ2_XS / Coder |
60 / 52 / 44 |
- | 48 / 36 / 33 |
- | 1,160 / 1,110 / 1,420 (at 32K) |
Published |
AMD Radeon AI PRO R9700 32 GB (gfx1201 RDNA4) |
IQ3_S / UD-Q4_K_XL (4-bit) |
75–95 / 63–87 |
- | - | - | 1,110 to 1,320 (at 32K, Q4_K_XL) |
Published |
NVIDIA RTX 5060 Ti 16 GB (64 GB DDR5, ±20% model) |
Q2_0 / IQ2_XS |
~87 / ~77 |
~81 / ~63 |
~62 / ~51 |
~53 / ~47 |
~472 / ~501 (pre-0.1.13 est.) |
Estimated (±20% model) |
NVIDIA RTX 3090 24 GB (64 GB DDR5, ±20% model) |
Q2_0 / IQ2_XS |
~140 / ~128 |
~130 / ~103 |
~100 / ~85 |
~85 / ~78 |
~491 / ~521 (pre-0.1.13 est.) |
Estimated (±20% model) |
Provenance: Published consumer GPU measurements and analytical hardware projections (±20% model) from upstream Strata docs/MODELS.md and docs/DETAILS.md.
Why three-tier placement and 1.1 to 2.6-bit trellis quantization belong together
In Strata, every extra gigabyte of free VRAM holds roughly 700 more routed experts at 2-bit precision, and every expert that fits in VRAM is one the CPU and PCIe bus never have to touch. That is why Strata and our Gyro TQ explainer reinforce each other:
More experts inside the same 12 GB to 24 GB VRAM budget
AgentionAI's upstream-0.2.4-agention fork of Strata adds native support for Gyro TQ's eight trellis-coded tensor types (TQK4 at 1.125 bits per weight through TQP7 at 3.625 bits per weight). Compressing expert or dense layers with block-Hadamard rotation and trellis lookup shrinks each expert's byte footprint so the GPU expert cache holds a larger share of the 24,576 experts in VRAM, while our damped AWQ pre-scaling (α ∈ [0.25, 0.30]) before Hadamard preserves outlier-channel precision (-83.1% to -85.6% validation MSE versus uncalibrated Hadamard).
Single-card economics for 35B to 125B models
A 35B-A3B Mixture-of-Experts model compressed to TQ2_T (2.125 bpw) drops from 19.76 GiB (Q4_K_M) to 10.49 GiB, fitting its entire expert arena plus a 6 GiB KV cache inside a single 24 GB card ($0.80/hr Modal L4 vs $1.95/hr 48 GB L40S). And when you step up to the 125B Qwen3.8-Flash-Next checkpoint (512 experts per layer plus a 51B PLE table), Strata's three-tier engine runs it at 77 to 88.8 tokens/s on a single 24 GB A10 or 78.6 to 94 tokens/s on a 12 GB desktop RTX 5070.
Honest boundaries: licenses, RAM bandwidth, and multi-user batching
We publish our lab notes so you can see both what works well and where the hard limits sit:
Engine license vs model weight licenses
Strata itself is open source under the MIT License. The models it runs carry their own licenses: Qwen3.8-Flash-Next (and derivative GGUF quantizations such as ISTA-DASLab/Qwen3.8-Flash-Next-GSQ-RCO-GGUF) is governed by the Qwen Community License 1.0, whose Clause 2 requires a separate commercial agreement from Qwen if you offer the model or its outputs to third parties in a hosted "Model as a Service" or "AI Work Assistant" product. Our Modal A10 run used only public and synthetic prompts for internal benchmarking.
Single-user speed vs parallel batching without --batch-mtp
Strata is tuned first for one fast interactive session (88.8 tok/s short chat and 80.5 tok/s agent turns on one A10). In our concurrency sweep with plain "parallel": 8 slots (without --batch-mtp), total throughput across 8 simultaneous requests rose by only +30% (77.4 tok/s at concurrency 1 to 101.0 tok/s total / 14.3 tok/s per stream at concurrency 8) because plain parallel slots lose per-stream MTP speculative speedups.
System RAM size and speed still matter
To keep all 24,576 experts pinned in RAM without SSD paging during generation, a desktop needs 64 GB of RAM (48 GB for Q2_0 / IQ2_XS, or 32 GB for the 256-expert Coder variant or when paired with a 24 GB GPU in --resident-experts mode). Because the CPU streams missed Q2_0 experts from RAM at ~41 GB/s, dual-channel DDR5 is roughly twice as fast on the CPU half of a round as DDR4.
Words used on this page
- Mixture-of-Experts (MoE)
- A neural network architecture that splits each layer's feed-forward network into many small "experts" (
512per layer inQwen3.8-Flash-Next) and uses a lightweight router to activate only a few (10per layer, or2%) for each token. - Gated DeltaNet
- A recurrent sequence mixer used in
36ofQwen3.8-Flash-Next's48layers whose memory state stays a fixed size (O(1) per token) instead of growing with prompt length. - Qwen Sparse Attention (QSA)
- The attention mechanism used in the remaining
12layers, with2key/value heads attending to at most~2,048selected positions regardless of total context length. - Per-Layer Embedding (PLE) table
- A
51-billion-parameter (28.8 GBinIQ4_NL) n-gram lookup table addressed by the last three token IDs. Because the row indices are known ahead of time, Strata reads just16rows (<= 23 KB) per token directly from an NVMe SSD viaO_DIRECT. - Multi-Token Prediction (MTP)
- A built-in draft layer that guesses up to
3future tokens cheaply so the full48-layer model can verify up to4tokens in a single forward pass (2.4to3.2accepted on average) with zero loss in greedy accuracy. - Pinned (page-locked) RAM
- System memory locked so the operating system never pages it to disk, allowing the CPU to compute experts in place while the GPU's DMA copy engine reads experts across the PCIe bus simultaneously.
- Route tail skip (
STRATA_ROUTE_TAIL_SKIP=7) - Skipping VRAM-missed experts that every token in a multi-token verify window ranked at the bottom of its top-10 (
rank 7..9), trading a tiny distribution shift (KL = 0.003to0.006) for+12.9%to+15.6%faster decoding. - KV streaming and
K8V4 - Keeping only the active
32,768key/value positions in VRAM above64Kcontext while streaming older positions from host RAM (--kv-resident 32768), and storing keys in8-bit with Hadamard-rotated4-bit values (--kv k8v4) so VRAM stays free for cached experts.